1. Field of the Invention
The present invention relates to a semiconductor device, which has circuits comprising thin film transistors (hereinafter referred to as TFTS) formed over a substrate having an insulating surface, and a fabricating process thereof. Particularly, the invention relates to an electro-optical device (also called electro-optical device) represented by a liquid crystal display device or an EL (electro-luminescence) display device which is constituted in such a manner that a pixel section (pixel circuit) and driving circuits (control circuits) disposed in its periphery are provided on the same substrate and an electric appliance (also called an electronic apparatus) which incorporates an electro-optical device.
Throughout the Specification, a semiconductor device denotes a device in general which functions by utilizing the semiconductor characteristics, and the above-mentioned electro-optical device and an electric appliance which incorporates the electro-optical device are also covered by the semiconductor device.
2. Description of the Related Art
The development of semiconductor devices, which comprise large-area integrated circuit formed from TFTs on substrate having insulating surface is being advanced. Known as representative examples of these semiconductor devices are an active matrix type liquid crystal display device, an EL display device, and a contact type image sensor. Particularly, TFTs having crystalline silicon film (typically polycrystalline silicon film) for active layers (hereinafter referred to as polycrystalline silicon TFTs) have a high field effect mobility and thus can form various functional circuits.
For example, in an active matrix type liquid crystal display device, a pixel section which performs image display, and driver circuits for controlling the pixel section (also referred to as peripheral driver circuits) such as shift registers, level shifters, buffers and sampling circuits which are based on CMOS circuits are formed by every function block on one substrate.
Since such driver circuits do not always have the same operating condition, the characteristics required of the TFTs naturally differ not a little. In the pixel section, pixel TFTs functioning as switching elements and auxiliary storage capacitance are provided, and a voltage is applied to the liquid crystal to drive it. Here, the liquid crystal needs to be driven by altering current, and the system called frame inversion driving is often adopted. Accordingly, for the characteristics required of the TFTs, it was necessary to keep the OFF-current value (the value of the drain current flowing when a TFT is in OFF-operation) sufficiently low. Further, the buffer, to which a high driving voltage is applied, had to have its withstand voltage enhanced up to such a degree that the buffer would not be broken even if a high voltage was applied thereto. Further, in order to enhance the current driving ability, it was necessary to sufficiently secure the ON-current value (the value of the drain current flowing when the TFT is in ON-operation).
However, there was a problem that the OFF-current value of a polycrystalline silicon TFT is apt to become high. Further, in case of a polycrystalline silicon TFT, there is observed the deterioration phenomenon that its ON-current value falls as in case of a CMOS transistor used in an IC or the like. The main cause therefor lies in the injection of hot carriers; it is considered that the hot carriers generated by the high electric field in the vicinity of the drain cause the deterioration phenomenon.
As a TFT structure for lowering the OFF-current value, the lightly doped drain (LDD) structure is known. This structure is made in such a manner that, between the channel forming region and the source region or the drain region to which an impurity is added at a high concentration, an impurity region having a low concentration is provided. This low concentration impurity region is known as LDD region.
Further, as a structure for preventing the degradation of the ON-current value due to the hot carrier injection, so-called GOLD (Gate-drain Overlapped LDD) structure is known. Because the LDD region is disposed so as to overlap the gate wiring through the gate insulating film, this structure is effective for preventing the injection of hot carriers in the vicinity of the drain to enhance the reliability. For example, Mutsuko Hatono, Hajime Akimoto and Takeshi Sakai, IEDM97 TECHNICAL DIGEST, pp. 523-526, 1997, discloses a GOLD structure by the side wall formed of silicon; and it is confirmed that a very high reliability can be obtained as compared with the TFTs of other structures.
Further, in the pixel section of an active matrix liquid crystal display device, a TFT is disposed to each of several hundred thousands to several millions of pixels, and these TFTs are each provided with a pixel electrode. An opposing electrode is disposed on the opposing substrate side interposing liquid crystal, thus forming a kind of capacitor with the liquid crystal as a dielectric. Then the voltage applied to each of the pixels is controlled by the switching function of the TFT to thereby control the charges to this capacitor, whereby the liquid crystal is driven, and the quantity of transmitted light is controlled, thus displaying an image.
However, the stored capacitance of this capacitor is gradually decreased due to the leakage current caused for causes pertaining to the OFF-current etc., which in turn becomes the cause for varying the quantity of transmitted light to lower the contrast of the image display. Thus, according to the known technique, a capacitor wiring is provided to form in parallel a capacitor (storage capacitance) other than the capacitor constituted with the liquid crystal as its dielectric, whereby the capacitance lost by the capacitor having the liquid crystal as its dielectric was compensated for.
However, the characteristics required of the pixel TFTs in the pixel section and the characteristics required of the TFTs (hereinafter referred to as driver TFTs) in the driver circuits such as the shift registers and the buffers are not necessarily identical with each other. For example, in case of a pixel TFT, a large reverse bias (minus, in case of an n-channel type TFT) voltage is applied to the gate wiring, but a driver TFT is never operated with a reverse bias voltage applied thereto. Further, the operating speed of the former TFT is not required to be as high as the latter.
Further, the GOLD structure has a high effect for preventing the deterioration of the ON-current value, indeed, on the other hand however, has the defect that the OFF-current value becomes large as compared with the ordinary LDD structure. Accordingly, it could not be considered that the GOLD structure was a desirable structure particularly for the pixel TFT. It has been known that, conversely, the ordinary LDD structure has a high effect for suppressing the OFF-current value but is low in resistance to the injection of hot carriers.
As stated above, it was not always desirable to form all the TFTs from the same structure, in a semiconductor device including a plurality of electric circuits as in case of an active matrix type liquid crystal display device.
Further, in case, as according to the known technique described above, a storage capacitance using a capacitor wiring is formed in the pixel section so as to secure a sufficient capacitance, the aperture ratio (the ratio of the image-displayable area to the area of each pixel) had to be sacrificed. Particularly in case of a small-sized, highly precise panel as is used in a projector type display device, the area per pixel is small, so that the reduction of the aperture ratio due to the capacitor wiring has become a problem.
The present invention relates to a technique for giving solutions to such problems, and it is the purpose of the invention to make the structures of the TFTs disposed in the respective circuits of a semiconductor device appropriate in accordance with the functions of the circuits to thereby enhance the operability and reliability of the semiconductor device. Further, it is an object of the invention to provide a fabrication process for realizing such a semiconductor device.
Another purpose of the invention is to provide a structure, for a semiconductor device having a pixel section, which structure is constructed in such a manner that the area of the storage capacitance provided to each pixel is reduced to enhance the aperture ratio. Further, the invention provides a process of fabricating such a pixel section.
In order to solve the above stated problems, the constituents of the present invention are:
an electro-optical device comprising a pixel section and a driver circuit over a same substrate is characterized in that:
a part or all of a LDD region of an n-channel TFT which comprises the driver circuit is formed so as to overlap with a gate wiring of the n-channel TFT by interposing a gate insulating film;
a LDD region of a pixel TFT which comprises the pixel section is formed so as not to overlap with a gate wiring of the pixel TFT by interposing a gate insulating film; and
an offset region is formed between a channel forming region and a LDD region of the pixel TFT.
In the above stated constitutions, it is preferable that the LDD region of an n-channel TFT which comprises the driver circuit includes an n-type impurity element at a higher concentration than the LDD region of the pixel TFT. In concrete, a concentration of 2 to 10 times that of the LDD region of the pixel TFT is preferable. More concretely, the LDD region of an n-channel TFT which comprises the driver circuit includes an n-type impurity element in a concentration range of 2xc3x971016 to 5xc3x971019 atoms/cm3 and the LDD region of the pixel TFT includes an n-type impurity element in a concentration range of 1xc3x971016 to 5xc3x971018 atoms/cm3.
Further, another constitutions of the present invention are: an electro-optical device comprising a pixel section and a driver circuit over a same substrate is characterized in that:
the driver circuit comprises a first n-channel TFT in which all of a LDD region is formed to overlap a gate wiring by interposing a gate insulating film and a second n-channel TFT in which a part of a LDD region is formed to overlap a gate wiring by interposing a gate insulating film;
a LDD region of a pixel TFT which comprises the pixel section is formed so as not to overlap a gate wiring of the pixel TFT by interposing a gate insulating film; and
an offset region is formed between a channel forming region and a LDD region of the pixel TFT.
In the above constitutions, n-type imurity element is included in the LDD region of the first n-channel TFT and/or the LDD region of the second n-channel TFT at a concentration higher than the LDD region of the pixel TFT (2 to 10 times in concrete).
Further, it is preferable that the LDD region formed in the first n-channel TFT is formed between a drain region and a channel forming region of the first n-channel TFT, and LDD regions formed in the second n-channel TFT are formed to sandwich a channel forming region of the second n-channel TFT.
Further, the constitutions regarding manufacturing process for realizing the constitutions of the present invention are: a method for manufacturing an electro-optical device which comprises a pixel section and a driver circuit over a same substrate comprising:
process (A) for forming a region which includes an n-type impurity element in an active layer of an n-channel TFT which forms the driver circuit in a concentration range of 2xc3x971016 to 5xc3x971019 atoms/cm3;
process (B) for forming a region which includes an n-type impurity element in an active layer of an n-channel TFT which forms the driver circuit in a concentration range of 1xc3x971020 to 1xc3x971021 atoms/cm3;
process (C) for forming a region which includes a p-type impurity element in an active layer of a p-channel TFT which forms the driver circuit in a concentration range of 3xc3x971020 to 3xc3x971021 atoms/cm3;
process (D) for forming a region which includes an n-type impurity region in an active layer of a pixel TFT which forms the pixel section in a concentration range of 1xc3x971016 to 5xc3x971018 atoms/cm3,
is characterized in that the process D is performed by adding an n-type impurity element by using as a mask a gate wiring that is covered by an insulating film comprising silicon.
Note that the order of each processes A to D may be appropriately altered. In this case, in whatever order the steps are carried out, the basic functions of the finally formed TFTs also remain unchanged; and thus, such change in the step order does not impair the effects of the invention.